SAQA All qualifications and part qualifications registered on the National Qualifications Framework are public property. Thus the only payment that can be made for them is for service and reproduction. It is illegal to sell this material for profit. If the material is reproduced or quoted, the South African Qualifications Authority (SAQA) should be acknowledged as the source.
SOUTH AFRICAN QUALIFICATIONS AUTHORITY 
REGISTERED QUALIFICATION THAT HAS PASSED THE END DATE: 

Master of Micro-and Nanoelectronic Engineering 
SAQA QUAL ID QUALIFICATION TITLE
105102  Master of Micro-and Nanoelectronic Engineering 
ORIGINATOR
University of Johannesburg 
PRIMARY OR DELEGATED QUALITY ASSURANCE FUNCTIONARY NQF SUB-FRAMEWORK
-   HEQSF - Higher Education Qualifications Sub-framework 
QUALIFICATION TYPE FIELD SUBFIELD
Master's Degree  Field 06 - Manufacturing, Engineering and Technology  Engineering and Related Design 
ABET BAND MINIMUM CREDITS PRE-2009 NQF LEVEL NQF LEVEL QUAL CLASS
Undefined  180  Not Applicable  NQF Level 09  Regular-Provider-ELOAC 
REGISTRATION STATUS SAQA DECISION NUMBER REGISTRATION START DATE REGISTRATION END DATE
Passed the End Date -
Status was "Registered" 
SAQA 0414/23  2018-12-07  2023-06-30 
LAST DATE FOR ENROLMENT LAST DATE FOR ACHIEVEMENT
2024-06-30   2027-06-30  

In all of the tables in this document, both the pre-2009 NQF Level and the NQF Level is shown. In the text (purpose statements, qualification rules, etc), any references to NQF Levels are to the pre-2009 levels unless specifically stated otherwise.  

This qualification does not replace any other qualification and is not replaced by any other qualification. 

PURPOSE AND RATIONALE OF THE QUALIFICATION 
Purpose:
The purpose of the Master of Micro-and Nanoelectronic Engineering qualification is to develop engineers with advanced abilities in applying fundamental microelectronics within multi-and cross-disciplinary environments of today's workplace. In addition to being able to respond to complex problems and provide solutions to challenges experienced in the field of Integrated Circuit (IC) and systems on package (SoP) design, the qualification will promote and develop the capability to perform independent research, investigate IC nanophenomena from scientific principles and implement outcomes to improve microelectronic designs.

The curriculum is designed to provide advanced knowledge in areas such as analogue, digital and mixed-signal electronic design, Radio Frequency (RF), Mm-Wave and communications engineering, physics of semiconductor materials, design for testability, and microelectronic processes. Curriculum is designed to assist students in acquiring advanced computer skills, including the excessive use of online resources and Electronic Design Automation (EDA) tools. The Degree includes a minor dissertation, thus promoting research and independent learning from the candidates.

Rationale:
With the ever-increasing need for mobile computing and communication, the field of microelectronics and Nanoelectronics has become the field that is driving the latest technology advances. More and more devices are built on chip (system-on-chip) level or on system-on-package level in order to cut down on size, power consumption and cost. This allows smaller, portable devices such as smartphones, tablets, modems and navigation devices to have an increased number of features at a fraction of the cost.

As the fabrication technologies decrease in feature size and the circuit density increases, device physics becomes more important and companies, in South Africa, Sub-Saharan Africa and globally, need highly skilled designers to perform the design tasks. As a result, an increasing number of universities around the world are offering Graduate Electrical Engineering Degrees with specialisation in microelectronics or Nanoelectronics, whereas traditionally, typical specialisations were in Electrical Engineering (high currents), electronics (low currents) and computer engineering. Typically, the specialisation occurs at Master's level. In South Africa, however, only one institution (University of Pretoria) currently offers a coursework Degree in Microelectronics, with several other institutions allowing microelectronics topics in research-based Postgraduate studies (e.g. Stellenbosch University), and none of these institutions support the online mode of delivery.

Microelectronics is one of the fastest growing industries in the world. However, in South Africa, on a yearly basis, only a handful number of learners graduate with a Postgraduate specialisation in this field, which resulted in a scarcity of qualified electronic engineers with an advanced knowledge of microelectronics.

The Master of Micro-and Nanoelectronic Engineering is designed to essentially target graduates from diverse ranges of disciplines, which include electronic, electrical and computer engineering, computer science, physics and material science. These candidates will be interested in acquiring advanced knowledge in microelectronics design and fabrication and various cross-or multidisciplinary skills, all aimed at sustainable electronics.

Upon completion of an Undergraduate Degree, a typical learner wanting to move to Postgraduate studies will choose a Postgraduate Degree or a specialisation that is offered by the institution at which he/she has completed their Undergraduate study. 

LEARNING ASSUMED TO BE IN PLACE AND RECOGNITION OF PRIOR LEARNING 
Recognition of Prior Learning (RPL):
RPL will be applied in line with National policies as well as institutional policies and guidelines.

The institution's policy stipulates that any persons who wishes to avail themselves of the opportunities offered by RPL could either approach the institution in person or could do so by letter (either written or electronic). They may also need advice and counselling before applying for RPL or else could be familiar with the process and require no further support.

RPL Timeline-the RPL process is lengthy and time-consuming. Those wishing to be considered for RPL must be advised to apply to the University one year in advance of the intended admissions date, to allow for timeous completion of all processes, including Senate approval prior to registration.

Please refer to the process explained below that illustrates the RPL process at the institution:

The RPL process comprise the following phases (in the case of this Degree, all the communication will be conducted online/via electronic means):

Student Enrolment Centre (SEC): The RPL Officer:
  • Provides information on the process.
  • Discusses and identifies the appropriate faculty, department and a possible programme.
  • Refers the applicant to the relevant faculty and the Faculty RPL Officer.
  • Communicates the applicant's details to the Faculty RPL Officer.

    The Faculty RPL Officer:
  • Discusses the RPL process (including fees) with the candidate.
  • Identifies an appropriate programme.
  • Provides the candidate with an RPL application form.
  • Checks the RPL application form for completeness.
  • Enters the applicant's information on the RPL database-generating an RPL number for the candidate.
  • Refers the application to the relevant Head of Department (HOD) and/or lecturers.

    HOD and/or lecturer(s) and Faculty RPL officer:
  • Conduct a first screening by discussing the merits of the application and taking a decision whether the candidate can go ahead with the formal assessment or not.
  • If the applicant is not successful, the Faculty RPL Officer communicates (in writing) the reasons to the candidate.
  • If the application is successful, a consent form is completed, indicating that the applicant may proceed with formal RPL assessment-the candidate receives a copy.
  • Meet with applicant to discuss formal RPL assessment, evidence required, timeframe, support assessment fees, etc.

    The applicant:
  • Pays the RPL assessment fee.
  • Submits the required evidence to the Faculty RPL Officer.

    HOD and/or Lecturer(s):
  • Assess the applicant's evidence.
  • Meet with the applicant for an interview; collect additional evidence (if required).
  • Consult external assessors (if applicable).
  • Submit a detailed RPL assessment report to the Dean's Committee/relevant faculty committee.

    The applicant:
  • Is informed (in writing) of the outcome of the RPL assessment.
  • If successful, may now apply for admission to the specific programme at the SEC.

    The RPL process for students comprise the following:
  • Enquire about the RPL process, obtain more information on the appropriate faculty/department, or prepare to submit a formal RPL application.
  • Discuss RPL needs with the RPL officer in the SEC to choose a relevant faculty/department/programme. Obtain an information booklet. Be referred to the relevant Faculty RPL Officer.
  • The applicant's RPL needs are discussed with the Faculty RPL officer who will explain the RPL process. An application form is provided which is completed and submitted to the Faculty RPL Officer. An RPL application fee is payable. The Faculty RPL officer will contact the applicant on the success of the first screening of the RPL application.
    Or
  • Submit a formal RPL application. Alternatively, obtain more information on the appropriate faculty/department and contact the relevant Faculty RPL officer to make an appointment or, complete a RPL application form available on the University of Johannesburg (UJ) web and submit to the Faculty RPL Officer for a first screening of the RPL application. Pay a RPL application fee.

    In both instances, the following steps then need to be completed:
  • If the first screening of the application was successful, a formal assessment of prior learning and existing skills is done. An appointment is made with the Faculty RPL Officer (including the head of the department and/or the relevant lecturer(s)) to discuss the type of assessment, evidence required, timeframe and available support, etc. An assessment fee is payable for the formal assessment.
  • A formal assessment is completed in the academic department which is a timeous process. These assessments will be electronic in nature and the process will be tailored to suit the needs of online applicants, as per UJ policy.
  • The candidate is informed if the application is successful on not, based on the formal assessment of prior knowledge and existing skills. If the application is successful, the candidate may complete a student application form to apply for a student place in the chosen programme.

    Entry Requirements:
    The minimum entry requirements are:
  • Bachelor Honours Degree in Electronic Engineering or related field such as Physical Physics, Mathematics, Computer Science or Material Science.
    Or
  • Bachelor of Technology in Electrical/Electronic Engineering that is supported by any Postgraduate learning or experience. 

  • RECOGNISE PREVIOUS LEARNING? 
    Y 

    QUALIFICATION RULES 
    This qualification consists of compulsory and elective modules at Level 9 totalling 180 Credits. Learners are required to complete the two major modules, Analogue and Radio Frequency (RF) Microelectronic Design and Digital and Memory Design and Synthesis, as well as the module Engineering Research Proposal Writing before they will be allowed to complete the Minor Dissertation in the second semester.

    If learners choose the module Research Related Specialisation field (15 Credits), it replaces both Nano-electronic Specialisation and Cross-Disciplinary Specialisation (7.5 + 7.5 Credits). Chosen elective credit weightings are therefore equivalent.

    Compulsory Modules at Level 8: 45 Credits:
  • Digital and Memory Design, 30 Credits.
  • Engineering Research Proposal Writing, 15 Credits.

    Elective Modules at Level 8: 15 Credits:
  • Nano-electronic Specialisation, 7.5 Credits.
  • Cross-Disciplinary Specialisation, 7.5 Credits.
  • Research Related Specialisation, 15 Credits.

    Compulsory Modules at Level 9: 120 Credits:
  • Analogue and RF Microelectronics, 30 Credits.
  • Mini Dissertation, 90 Credits. 

  • EXIT LEVEL OUTCOMES 
    1. Analyse and solve micro-and Nanoelectronic engineering research and development problems creatively and innovatively by applying relevant fundamental knowledge.
    2. Organise and manage own activities responsibly, effectively, professionally and ethically, and accept responsibility within own limits of competence, and exercise judgment based on knowledge and expertise pertaining to the field.
    3. Plan and conduct applicable levels of investigation, research and/or experiments by applying appropriate theories and methodologies, and perform data analysis and interpretation.
    4. Use and assess appropriate methods, skills, Electronic Design Automation (EDA) and simulation tools, open access software and information technology effectively and critically in engineering research/development practice, and show an understanding and a willingness to accept responsibility for the impact of engineering research/development activities on society and the environment.
    5. Perform procedural and non-procedural design and synthesis of microelectronic components and nanosystems, generate prototypes and product-oriented processes as a set of related systems, understand design for test (DFT) principles, and assess social, legal, health, safety and environmental impact and benefits of the above, where applicable.
    6. Employ various learning strategies and skills to master outcomes required for preparing oneself to engage in continuous learning, to keep abreast of knowledge and skills required in the field of micro-and Nanoelectronics.
    7. Demonstrate, where applicable, cultural and aesthetic sensitivity across a range of social contexts in the execution of engineering research and development activities.
    8. Organise and develop entrepreneurial opportunities through engineering, technical research, development and/or managerial skills. 

    ASSOCIATED ASSESSMENT CRITERIA 
    Associated Assessment Criteria for Exit Level Outcome 1:
  • Identify correct models to be used to complete complex-circuit design cycle and make use of the available design and simulation tools to verify the design.
  • Apply the first-principle transistor theory to design innovative complex real-life digital, analogue and Radio Frequency (RF) circuits.

    Associated Assessment Criteria for Exit Level Outcome 2:
  • Demonstrate the ability to complete the set work in time with sufficient level of comprehension.
  • Successfully complete a minor dissertation on a suitable Micro-or Nanoelectronic related problem in prescribed time and following a set of milestones.

    Associated Assessment Criteria for Exit Level Outcome 3:
  • Demonstrate the ability to make use of databases for literature and patent searches.
  • Successfully evaluate a selection of reference literature.
  • Demonstrate the ability to formulate a research proposal and test a hypothesis.
  • Demonstrate the ability generate the data that proves or disproves the hypothesis.
  • Organise content in the form written work.

    Associated Assessment Criteria for Exit Level Outcome 4:
  • As a part of data collection and hypothesis testing, identify correct models to be used to complete complex-circuit design cycle and make use of the available design and simulation tools to verify designs that can be used to prove or disprove the hypothesis.
  • Demonstrate the ability to reproduce said designs in a form of a real-life fully testable prototype using applicable design software.
  • Demonstrate the ability to accept responsibility for the impact of the prototype on the society and environment.

    Associated Assessment Criteria for Exit Level Outcome 5:
  • Demonstrate the ability to create fully-testable systems.
  • Demonstrate the ability to connect the systems into set of related systems forming a prototype.
  • Be able to list social, legal, health, safety and environmental implications of such prototype.

    Associated Assessment Criteria for Exit Level Outcome 6:
  • Prove that the research performed during this course is current with the world trends.
  • Suggest the future work that can be performed to keep in-line in industry trends in micro-and Nanoelectronics.

    Associated Assessment Criteria for Exit Level Outcome 7:
  • Show, by means of examples, how the research performed can benefit a range of social contexts.

    Associated Assessment Criteria for Exit Level Outcome 8:
  • Show, by means of examples, the entrepreneurial opportunities that arise from the research performed.

    Integrated Assessment:
    Assessment takes place in accordance with the University's Assessment Policy and the Faculty-specific assessment policy. The Department uses continuous assessment (CA) as a means of evaluation. Programme-specific assessment regulations are determined by the Faculty Board and approved by Senate.

    Programme-specific assessment criteria, rules and regulations must be communicated to students in all learning guides. The assessment methods used are based on the institution and Faculty principles of assessment. The number and range of assessment methods are included in the learning guides. Every assessment opportunity carries a predetermined weight that takes the integration of the outcomes into account.

    Module lecturers must provide detailed, written and constructive feedback on student work within fifteen working days after an assessment opportunity.

    Moderation verifies that assessments are fair, reliable, valid, practicable and transparent and also evaluates assessor performance. The following principles apply for the moderation of student evidence in this programme:
  • At least one assessment opportunity (including the special assessment or supplementary thereof) are moderated per module.
  • The moderated assessment opportunities are those that carry the greatest weight in the calculation of the final module mark and are determined by the assessor.
  • All modules are moderated externally. 

  • INTERNATIONAL COMPARABILITY 
    The following international qualifications were found to be comparable with this qualification.
  • Master in Microelectronics. and Computer Science offered at MINES Saint-Étienne in France.

    The in Microelectronics. and Computer Science offered at MINES is purely coursework where University of Johannesburg (UJ) offers both coursework and a dissertation. Focused on microelectronics combined with computer science, where UJ's Degree with introduce a concept of Nanoelectronics as well. Walk-in only.
  • Masters of Engineering (MEng) in Electrical Engineering: The Microelectronics Track offered at Delft University of Technology in the Netherlands.

    The MEng in Electrical Engineering: The Microelectronics Track consists of coursework with a mini-dissertation, with core modules, specialisation and electives. The Degree of specialisation and detail is similar to the proposed model of UJ. Offered as a contact Degree, thus UJ's strength is in the online offering.
  • Master's Microelectronics and Photonics offered at Vienna University of Technology in Austria.

    The Master's Microelectronics and Photonics Contact is a coursework Degree focusing more on the photonics and less on the microelectronics side.
  • Masters of Engineering (MS Eng). (ICs and Microsystems) offered at Johns Hopkins University in the United States of America.

    The MS Eng. (ICs and Microsystems) consists of coursework with a mini-dissertation course focusing on the current microelectronic trends and sustainable energy. Similar to the UJ offering, where the focus of the UJ offering is more on African problems and solutions. 

  • ARTICULATION OPTIONS 
    Horizontal:
    Master in Electronic Engineering or related field such as Physical Physics, Mathematics, Computer Science or Material Science, 180 Credits, NQF Level 9.

    Vertical:
    Doctor of Philosophy in Micro-and Nanoelectronic Engineering, 360 Credits, NQF Level 10. 

    MODERATION OPTIONS 
    N/A 

    CRITERIA FOR THE REGISTRATION OF ASSESSORS 
    N/A 

    NOTES 
    N/A 

    LEARNING PROGRAMMES RECORDED AGAINST THIS QUALIFICATION: 
     
    NONE 


    PROVIDERS CURRENTLY ACCREDITED TO OFFER THIS QUALIFICATION: 
    This information shows the current accreditations (i.e. those not past their accreditation end dates), and is the most complete record available to SAQA as of today. Some Primary or Delegated Quality Assurance Functionaries have a lag in their recording systems for provider accreditation, in turn leading to a lag in notifying SAQA of all the providers that they have accredited to offer qualifications and unit standards, as well as any extensions to accreditation end dates. The relevant Primary or Delegated Quality Assurance Functionary should be notified if a record appears to be missing from here.
     
    NONE 



    All qualifications and part qualifications registered on the National Qualifications Framework are public property. Thus the only payment that can be made for them is for service and reproduction. It is illegal to sell this material for profit. If the material is reproduced or quoted, the South African Qualifications Authority (SAQA) should be acknowledged as the source.